1. Field of the Invention
The present invention generally relates to processing systems. More specifically, the present invention relates to enhancing efficiencies and performance in video processing systems configured for multi-processor unit operation and capable of performing 3D rendering.
2. Background Art
Recent developments in conventional graphics technology have created the ability to produce extraordinarily realistic video images. In most video systems, a specialized processor is responsible for configuring these images for display on a monitor. As the realism of these images has increased, so has the amount and complexity of the information required to produce the images. Correspondingly, the performance demands on these processors has also increased. To meet these increasing performance demands, display activity is no longer handled by the system's central processing unit (CPU). Instead, display activity processing is now handled by intelligent graphics cards including a coprocessor known as a graphics processing unit (GPU), also called a video processing unit (VPU).
At the crux of the aforementioned developments in graphics technology is the ability to convert information stored in a processing system's memory to video signals for output to the monitor. One device commonly used to perform this conversion is known as a display adapter. In short, the display adapter creates a pipeline for the real-time conversion of graphics patterns, stored in a GPU's memory frame buffers, into the video signals output to the monitor. Additional improvements in graphics technology, however, have created the ability to combine the processing power of two or more GPU's (multi-GPUs) operating simultaneously, to produce even more realistic and more complicated images. Multiple GPUs, for example, are especially beneficial for rendering different portions of an image to respective portions of a monitor.
Interfaces have been developed to connect two or more display adapters together from two or more GPUs, in a multi-GPU system, for faster graphics rendering on the monitor. These interfaces, for example, enable the execution of complicated programs, such as 3-dimensional (3D) rendering applications, by multiple GPUs simultaneously. One such interface is known as CrossFire.
Even further developments have provided the ability to balance loads between these multiple simultaneously operating processors to more efficiently and more quickly render these complicated images. As performance demands have continued to increase, several shortcomings have emerged with respect to these multi-GPU rendering and load balancing solutions.
On a more technical level, existing video or graphics processing systems include the capability to drive multiple GPUs, as noted above. Using the current solutions, however, each of these multiple GPUs points to its own unique command buffer. GPU operation is driven by command buffers containing instructions that specify how the GPU is to render a scene. These buffers can be quite large, particularly on complex scenes running on powerful GPU's. Current solutions require that each GPU have its own unique command buffer, which results in large sections of duplication between these command buffers. This requires that the CPU perform at least twice as much work in order to create the unique command buffers for each GPU. As a result, the command buffers, in whole or in part, are unnecessarily duplicated. That is, when display activity commands are sent from the system's CPU, the commands are sent to multiple GPUs and/or multiple buffers, requiring at least twice the work.
Additionally, conventional graphics processing systems are significantly limited in their ability to dynamically and efficiently distribute rendering loads across multiple GPUs. Particularly, these conventional systems are unable to distribute the load in a manner that matches each GPU's capabilities to the demands of scenes displayed on respective portions of the monitor.
By way of example, consider images associated with the display of a flight simulator program. FIG. 4, for example, is an exemplary illustration of a screen shot 400 from a popular flight simulator video game. In this example, a bottom portion 402 of the screen shot 400 includes dials and controls, along with other 2-dimensional (2D) static images. A top portion 404 of the screen shot 400, however, includes a 3D rendered world consisting of many rapidly changing images. The top portion 404, therefore, will require more GPU power to render than bottom portion 402 because the bottom portion 402 is less complex. Conventional graphics processing systems cannot efficiently distribute the load across multiple GPUs to render the top portion 404 of the screen shot 400 in the manner discussed above.
Additionally, the conventional multi-GPU systems require specifically designed multi-GPU aware drivers. This awareness extends throughout the entire driver stack, increasing code complexity and development cost.
What is needed, therefore, are methods and systems to eliminate or reduce the need for duplicate command buffers in multi-GPU systems. Also needed are methods and systems that more efficiently distribute rendering loads across multiple GPUs. Additional methods and systems are needed to facilitate greater compatibility with existing multi-GPU system products.